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FPGA TS2068

12 messages · 2015-11-10 → 2016-05-16 · Yahoo Group era · View archive on archive.org

Participants: jburrell7, Jeff Burrell, Eduardo Fuentes, Louis Florit, Adam Trionfo, david

Preserved from the Timex/Sinclair 2068 Yahoo Group (2001–2019), which is no longer online. Text reproduced from the archive.org archive; email addresses masked.

Messages

1. FPGA TS2068

jburrell7 · 10 Nov 2015 09:32:10 -

I have a working version of a TS2068 residing on a Terasic DE1 board. The hardware consists of:
 512KB of SRAM, 4MB of flash, 8MB of SDRAM, TS2068 video with an additional 64 column mode with full attributes, sound (thanks to Mike Stirling's spectrum emulator), a 80X25 text mode terminal (thanks to Grant Searle's Multicomp), and an SD card interface (again, thanks to Grant). 


 The MAIN and EXROM code resides in the flash and the SRAM is being used for program storage. The TS video is in a 16K dual port RAM internal to the FPGA, so there is no contention between the video and the Z80. This may be a problem for some software that relies on the pausing of the Z80 when the video is being accessed.


 So far only the most basic of functionality is working, but I can enter a simple program via a PS2 keyboard and the emulator seems to be responding properly. I have not yet tried accessing the SDRAM, but the flash and SRAM interfaces seem to be working well. I decided not to implement the original banking scheme since it is rather convoluted. Instead all of the TS banks (main, dock and EXROM) have eight 16 bit chunk registers that form the upper address bits to allow accessing the full 12.5MB+ of memory space.


 I am trying to decide the best way of implementing the SD card as a drive. I would like to use FAT16, but I have found out that the default cluster size for a 2GB card is 32K which is really wasteful. Any suggestions here would be welcomed.


 At some point I would like to add a RTC, ethernet, and second VGA port for dual monitor capability. First, though, is to get the basic functionality working.


 I am out of town right now, but I can post some photos next week if anyone wants to see them.

2. Re: [ts2068] FPGA TS2068

Louis Florit · Tue, 10 Nov 2015 14:48

Wow, this is really neat work.  How much time did you spend to get this
done?  You would have enough space on a SD card to load every single
application ever written for the TS2068...

On Tue, Nov 10, 2015 at 9:32 AM, [email] [ts2068] <
[email]> wrote:

>
>
> I have a working version of a TS2068 residing on a Terasic DE1 board. The
> hardware consists of:
>
> 512KB of SRAM, 4MB of flash, 8MB of SDRAM, TS2068 video with an additional
> 64 column mode with full attributes, sound (thanks to Mike Stirling's
> spectrum emulator), a 80X25 text mode terminal (thanks to Grant Searle's
> Multicomp), and an SD card interface (again, thanks to Grant).
>
>
> The MAIN and EXROM code resides in the flash and the SRAM is being used
> for program storage. The TS video is in a 16K dual port RAM internal to the
> FPGA, so there is no contention between the video and the Z80. This may be
> a problem for some software that relies on the pausing of the Z80 when the
> video is being accessed.
>
>
> So far only the most basic of functionality is working, but I can enter a
> simple program via a PS2 keyboard and the emulator seems to be responding
> properly. I have not yet tried accessing the SDRAM, but the flash and SRAM
> interfaces seem to be working well. I decided not to implement the original
> banking scheme since it is rather convoluted. Instead all of the TS banks
> (main, dock and EXROM) have eight 16 bit chunk registers that form the
> upper address bits to allow accessing the full 12.5MB+ of memory space.
>
>
> I am trying to decide the best way of implementing the SD card as a drive.
> I would like to use FAT16, but I have found out that the default cluster
> size for a 2GB card is 32K which is really wasteful. Any suggestions here
> would be welcomed.
>
>
> At some point I would like to add a RTC, ethernet, and second VGA port for
> dual monitor capability. First, though, is to get the basic functionality
> working.
>
>
> I am out of town right now, but I can post some photos next week if anyone
> wants to see them.
>
>
> 
>



-- 
Louis Florit  - :(){ :|:& };:

3. Re: [ts2068] FPGA TS2068

jburrell7 · 10 Nov 2015 15:00:47 -

I have been plunking away at this for about 3 years, but have not had any time to get it all working until now. I started from scratch and got it coded and working in about a week.

4. Re: FPGA TS2068

jburrell7 · 04 May 2016 09:51:59 -

I have not been able to give this project all of the attention I would like, but I now have a program running on my Windows 7 PC that allows loading and saving standard TAP/TZX files to/from my FPGA using a 56.7K serial link. I tried 115.2K but the FPGA could not keep up. I am not sure where the problem is because 115.2K should (just) meet the timing with a 3.528MHz clock. In any case, the upload/download is plenty fast enough for my needs at the moment (9K bytes in about 4 seconds). 

 I did this my modifying the EXROM to hijack the low level R_TAPE and W_TAPE subroutines that in/output the pulses to the tape. Unfortunately, this method will only work for files saved as standard TAP files, so programs using special loaders will not be usable.  Besides, I am not too enamoured with the tectonic speed of tape loads and saves.


 This method will not work with a stock 2068 because I have moved the new EXROM to my bankswitched RAM to minimize changes to the EXROM and allow for dedicated serial buffers. Once I am more comfortable with how the EXROM and HOME banks interact, I will try removing this restriction by burning the code into ROM and banking in the necessary buffer memory.


 More debugging will be needed because the MERGE function (and I suppose VERIFY as well) is broken. The result of trying to MERGE is interesting, but causes the machine to crash. 

 I have been able to run the PD.TXZ, BASIC64.TAP, Zeus Assembler, and Psion Flight Simulator. Flight Simulator does not want to respond to the arrow keys to turn the airplane, so I think more work will be needed on the FPGA. I tried loading Frogger but it terminates after the first section is loaded. Trashman loads the sign-on screen, but then crashes when the loader is loading. Obviously, more work will be needed.


 The next steps will be to:
 1. Debug the MERGE problem. I think I will disable verify since the serial routines are fairly robust and minimize the possibility of garbage being saved to the pseudotapes.
 2. Flash the modified EXROM so I don't need to keep downloading it.
 3. Modify a spectrum 48K ROM to use the new serial tape routines and add it to the boot list.
 4. Add ULAPlus functionality for better video modes (https://sites.google.com/site/ulaplus/home)
 5. Look into adding OpenSE basic to the boot screen.
 6. Add an option on the boot screen to load DOCK files from the pseudo tapes and start to them.


 Eventually, I want to get a PCB made to allow interfacing joysticks and other peripherals.

5. Re: [ts2068] Re: FPGA TS2068

Eduardo Fuentes · Sat, 7 May 2016 23:35:

Very good work!!!Keep going.Do you have some pictures?


   De: "[email] [ts2068]" <[email]>
 Para: [email] 
 Enviado: Miércoles, 4 de mayo, 2016 13:51:59
 Asunto: [ts2068] Re: FPGA TS2068

    I have not been able to give this project all of the attention I would like, but I now have a program running on my Windows 7 PC that allows loading and saving standard TAP/TZX files to/from my FPGA using a 56.7K serial link. I tried 115.2K but the FPGA could not keep up. I am not sure where the problem is because 115.2K should (just) meet the timing with a 3.528MHz clock. In any case, the upload/download is plenty fast enough for my needs at the moment (9K bytes in about 4 seconds).
I did this my modifying the EXROM to hijack the low level R_TAPE and W_TAPE subroutines that in/output the pulses to the tape. Unfortunately, this method will only work for files saved as standard TAP files, so programs using special loaders will not be usable.  Besides, I am not too enamoured with the tectonic speed of tape loads and saves.
This method will not work with a stock 2068 because I have moved the new EXROM to my bankswitched RAM to minimize changes to the EXROM and allow for dedicated serial buffers. Once I am more comfortable with how the EXROM and HOME banks interact, I will try removing this restriction by burning the code into ROM and banking in the necessary buffer memory.
More debugging will be needed because the MERGE function (and I suppose VERIFY as well) is broken. The result of trying to MERGE is interesting, but causes the machine to crash.
I have been able to run the PD.TXZ, BASIC64.TAP, Zeus Assembler, and Psion Flight Simulator. Flight Simulator does not want to respond to the arrow keys to turn the airplane, so I think more work will be needed on the FPGA. I tried loading Frogger but it terminates after the first section is loaded. Trashman loads the sign-on screen, but then crashes when the loader is loading. Obviously, more work will be needed.
The next steps will be to:1. Debug the MERGE problem. I think I will disable verify since the serial routines are fairly robust and minimize the possibility of garbage being saved to the pseudotapes.2. Flash the modified EXROM so I don't need to keep downloading it.3. Modify a spectrum 48K ROM to use the new serial tape routines and add it to the boot list.4. Add ULAPlus functionality for better video modes (https://sites.google.com/site/ulaplus/home)5. Look into adding OpenSE basic to the boot screen.6. Add an option on the boot screen to load DOCK files from the pseudo tapes and start to them.
Eventually, I want to get a PCB made to allow interfacing joysticks and other peripherals.
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6. Re: [ts2068] Re: FPGA TS2068

Jeff Burrell · Fri, 13 May 2016 17:00

Eduardo,Here is a link to a brief YouTube video that shows the progress of the project.


https://www.youtube.com/watch?v=jB9OW3kfsqs







    On Saturday, May 7, 2016 7:20 PM, "Eduardo Fuentes [email] [ts2068]" <[email]> wrote:



     Very good work!!!Keep going.Do you have some pictures?



   De: "[email] [ts2068]" <[email]>
 Para: [email] 
 Enviado: Miércoles, 4 de mayo, 2016 13:51:59
 Asunto: [ts2068] Re: FPGA TS2068

    I have not been able to give this project all of the attention I would like, but I now have a program running on my Windows 7 PC that allows loading and saving standard TAP/TZX files to/from my FPGA using a 56.7K serial link. I tried 115.2K but the FPGA could not keep up. I am not sure where the problem is because 115.2K should (just) meet the timing with a 3.528MHz clock. In any case, the upload/download is plenty fast enough for my needs at the moment (9K bytes in about 4 seconds).
I did this my modifying the EXROM to hijack the low level R_TAPE and W_TAPE subroutines that in/output the pulses to the tape. Unfortunately, this method will only work for files saved as standard TAP files, so programs using special loaders will not be usable.  Besides, I am not too enamoured with the tectonic speed of tape loads and saves.
This method will not work with a stock 2068 because I have moved the new EXROM to my bankswitched RAM to minimize changes to the EXROM and allow for dedicated serial buffers. Once I am more comfortable with how the EXROM and HOME banks interact, I will try removing this restriction by burning the code into ROM and banking in the necessary buffer memory.
More debugging will be needed because the MERGE function (and I suppose VERIFY as well) is broken. The result of trying to MERGE is interesting, but causes the machine to crash.
I have been able to run the PD.TXZ, BASIC64.TAP, Zeus Assembler, and Psion Flight Simulator. Flight Simulator does not want to respond to the arrow keys to turn the airplane, so I think more work will be needed on the FPGA. I tried loading Frogger but it terminates after the first section is loaded. Trashman loads the sign-on screen, but then crashes when the loader is loading. Obviously, more work will be needed.
The next steps will be to:1. Debug the MERGE problem. I think I will disable verify since the serial routines are fairly robust and minimize the possibility of garbage being saved to the pseudotapes.2. Flash the modified EXROM so I don't need to keep downloading it.3. Modify a spectrum 48K ROM to use the new serial tape routines and add it to the boot list.4. Add ULAPlus functionality for better video modes (https://sites.google.com/site/ulaplus/home)5. Look into adding OpenSE basic to the boot screen.6. Add an option on the boot screen to load DOCK files from the pseudo tapes and start to them.
Eventually, I want to get a PCB made to allow interfacing joysticks and other peripherals.



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7. Re: [ts2068] Re: FPGA TS2068

Adam Trionfo · Fri, 13 May 2016 20:46

>>

Here is a link to a brief YouTube video that shows the progress of the project.

>>


Nice video.  Thanks for sharing your project with us.  I like that you played Frogger.  I haven't actually played this on the T/S 2068 (I've played the ZX81 version though).  Does your FPGA support that cartridge port yet?  If it does, then I'd love to see a game running.


Adam

8. Re: [ts2068] Re: FPGA TS2068

Jeff Burrell · Sat, 14 May 2016 01:18

Adam,I can run cartridges, but I wrap some assembler code around the .DCK file and download it into RAM on the FPGA board and then run it from there. I have successfully run several cartridge games and utilities that way. 

    On Friday, May 13, 2016 5:19 PM, "Adam Trionfo [email] [ts2068]" <[email]> wrote:


     >>Here is a link to a brief YouTube video that shows the progress of the project.>>
Nice video.  Thanks for sharing your project with us.  I like that you played Frogger.  I haven't actually played this on the T/S 2068 (I've played the ZX81 version though).  Does your FPGA support that cartridge port yet?  If it does, then I'd love to see a game running.
Adam
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9. Re: [ts2068] Re: FPGA TS2068

jburrell7 · 14 May 2016 17:40:17 -

I have gotten the ADC in the DE1 codec to work now so I can load TAP and TZX files after they have been converted to WAV files by TZX2WAV. I am still having some trouble with the emulator keyboard: Manic Miner does not respond to keyboard inputs.

10. Re: [ts2068] Re: FPGA TS2068

Jeff Burrell · Sun, 15 May 2016 13:05

I finally figured out that bad logic in my Kempston and TS2068 joystick interfaces was causing the keyboard problems in Flight Simulator an Manic Miner. Both programs were receiving data indicating that ALL of the joystick inputs were active. With that fixed I can download the programs and they are working just fine.

11. Re: FPGA TS2068

david · 16 May 2016 02:55:40 -

Very cool, Jeff. I just boosted the view count on your video :)

David

12. Re: [ts2068] Re: FPGA TS2068

Eduardo Fuentes · Mon, 16 May 2016 13:49

Jeff,Again, excellent work!!!
I think this is the first FPGA project specifically designed to the 2068.



      De: "Jeff Burrell [email] [ts2068]" <[email]>
 Para: [email] 
 Enviado: Viernes, 13 de mayo, 2016 14:00:41
 Asunto: Re: [ts2068] Re: FPGA TS2068

    Eduardo,Here is a link to a brief YouTube video that shows the progress of the project.

https://www.youtube.com/watch?v=jB9OW3kfsqs




    On Saturday, May 7, 2016 7:20 PM, "Eduardo Fuentes [email] [ts2068]" <[email]> wrote:


     Very good work!!!Keep going.Do you have some pictures?


   De: "[email] [ts2068]" <[email]>
 Para: [email] 
 Enviado: Miércoles, 4 de mayo, 2016 13:51:59
 Asunto: [ts2068] Re: FPGA TS2068

    I have not been able to give this project all of the attention I would like, but I now have a program running on my Windows 7 PC that allows loading and saving standard TAP/TZX files to/from my FPGA using a 56.7K serial link. I tried 115.2K but the FPGA could not keep up. I am not sure where the problem is because 115.2K should (just) meet the timing with a 3.528MHz clock. In any case, the upload/download is plenty fast enough for my needs at the moment (9K bytes in about 4 seconds).
I did this my modifying the EXROM to hijack the low level R_TAPE and W_TAPE subroutines that in/output the pulses to the tape. Unfortunately, this method will only work for files saved as standard TAP files, so programs using special loaders will not be usable.  Besides, I am not too enamoured with the tectonic speed of tape loads and saves.
This method will not work with a stock 2068 because I have moved the new EXROM to my bankswitched RAM to minimize changes to the EXROM and allow for dedicated serial buffers. Once I am more comfortable with how the EXROM and HOME banks interact, I will try removing this restriction by burning the code into ROM and banking in the necessary buffer memory.
More debugging will be needed because the MERGE function (and I suppose VERIFY as well) is broken. The result of trying to MERGE is interesting, but causes the machine to crash.
I have been able to run the PD.TXZ, BASIC64.TAP, Zeus Assembler, and Psion Flight Simulator. Flight Simulator does not want to respond to the arrow keys to turn the airplane, so I think more work will be needed on the FPGA. I tried loading Frogger but it terminates after the first section is loaded. Trashman loads the sign-on screen, but then crashes when the loader is loading. Obviously, more work will be needed.
The next steps will be to:1. Debug the MERGE problem. I think I will disable verify since the serial routines are fairly robust and minimize the possibility of garbage being saved to the pseudotapes.2. Flash the modified EXROM so I don't need to keep downloading it.3. Modify a spectrum 48K ROM to use the new serial tape routines and add it to the boot list.4. Add ULAPlus functionality for better video modes (https://sites.google.com/site/ulaplus/home)5. Look into adding OpenSE basic to the boot screen.6. Add an option on the boot screen to load DOCK files from the pseudo tapes and start to them.
Eventually, I want to get a PCB made to allow interfacing joysticks and other peripherals.




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TS2068 / TC2068 · Hardware projects & new boards · Spectrum emulation & software